DataRace - Fully Integrated Dual-Polarized Antenna Array
with Ultra-Wideband Single- Chip CMOS Receiver
Prof. Dr.-Ing. Friedel Gerfers
Dept. of Computer Engineering and Microelectronics
Mixed Signal Circuit Design
Prof. Dr.-Ing. Georg Böck
Berlin Institute of Technology
Chair in Microwave Engineering
Prof. Dr.-Ing. Arne F. Jacob
Hamburg University of Technology
Studiendekanat Elektrotechnik, Informatik und Mathematik
Institut für Hochfrequenztechnik (E-3)
The project DataRace is the successor of the PolyData project, whose project goal was to develop a single-element W-band transmitter as well as a small transmitter array. The main goal of DataRace is to extend the concept to a complete “base station” receiver with independent one-dimensional beam-steering considering two polarization planes. The DataRace is focusing on an advanced front-end consisting of a wideband, circularly polarized antenna covering the entire W-band and a subsequent receiver chip enabling a combined RX data rate up to 100 Gb/s. Both building blocks are implemented in a SiP and shall be used as an element of a larger array. Besides the low-noise front-end amplifier, the RX CMOS IC will include functionalities like frequency down-conversion and IF-to-digital conversion. A low-cost 3D manufacturing process is used for the antenna integration including the direct interfaces to both polarizations of the CMOS receiver chip. The CMOS chip design is performed by the working groups of Prof. Böck (front-end part) and Prof. Gerfers (analog baseband part) both from TU Berlin, while the antenna and packaging issues are addressed by Prof. Jacob working group from TU Hamburg-Harburg. The system performance will experimentally verified in collaboration with the SPP1655 project Tera50+ from the University Duisburg-Essen. This way the receiver side and the higher integration density associated with a complete receiver unit within a larger array are fully characterized.
A key goal of the whole project is to explore the potential of high-volume, low-cost production technologies as enabler of consumer market applications. Therefore, the approach of the first project phase is pursued here, too.
W-band CMOS receiver IC (TUB) – From technological platform perspective the complete active RX circuit implementation will be performed in CMOS as this technology offers outstanding and unique advantages over all other technological platforms like single-chip integration of complete RF front-end including the mixed-signal baseband building blocks with lowest power consumption, highest integration density, smallest chip size and lowest costs under mass production. According to the ITRS roadmap the 28 nm CMOS process offers fT values of around 500 GHz and is commercially available. Thus, the 28nm CMOS is suitable for the DataRace project.
3D integration (TUHH) – The same stereolithographic polymer process (RMPD® by microTEC) as used in the first project phase for the antenna integration will be considered in DataRace as well. It provides 3D design flexibility and allows for micrometer-scale feature sizes at low (production) cost. This paves the way for low parasitic interconnection between the CMOS chip and the antenna with versatile signal combining approaches and novel low-loss circuit topologies involving air filled structures. Substantial challenges are amongst others the high packaging density dictated by antenna physics, the overall system complexity, the necessity for advanced 3D designs while still complying with the process rules. An additional project goal is the reduction in manufacturing costs without substantially sacrificing the (very demanding) electrical performance. Before fabrication at microTEC, designs will be verified base on breadboards, as this is a proven path and an adequate means for a rapid prototyping approach. This will involve in-house technologies, such as high-precision milling and state-of-the-art multilayer-substrate processing.