2016
State: 27.8.2019
100 Gbit/s {End-to-End} Communication: Designing Scalable Protocols with Soft {Real-Time} Stream Processing
In Proc. 41st Annual IEEE Conference on Local Computer Networks (LCN 2016), Dubai, United Arab Emirates (UAE), Nov., 2016.
Keywords: Scalable Protocols; 100 Gbit/s End-to-End; Soft Real-Time, Protocol Stream Processing
Next Generation mm-Wave Wireless Backhaul Based on LOS MIMO Links
In Proc. 10th German Microwave Conference 2016 (GeMiC 2016), Bochum, Germany, March, 2016.DOI: 10.1109/GEMIC.2016.7461558
On EIRP Control in Downlink Precoding for Massive MIMO Arrays
In Proc. International ITG Workshop on Smart Antennas (WSA 2016), Munich, Germany, Mar., 2016.
A DC to 10.1 GHz, 31dB Gain Range Control, Digital Programmable Gain Amplifier
In Proc. 10th German Microwave Conference 2016 (GeMiC 2016), Bochum, Germany, March, 2016.
A 40 GS/s 4 bit SiGe BiCMOS Flash ADC
In Proc. 31st Annual IEEE Bipolar / BiCMOS Circuits and Technology Meeting (BCTM), pp. 138-141, Miami, Florida, USA, October, 2017.DOI: 10.1109/BCTM.2017.8112929
Analysis and Design of a Linear Digital Programmable Gain Amplifier in a 0.13 µm SiGe BiCMOS technology
Frequenz - Journal of RF-Engineering and Telecommunications, vol. 71, no. 3-4, pp. 143-150, DOI: 10.1515/freq-2016-0213, 2017.
A Wideband Phase Detector SiGe HBT MMIC for Multi-Gigabit Synchronous Receivers
In Proc. 10th German Microwave Conference 2016 (GeMiC 2016), Bochum, Germany, March, 2016.
Low Complexity 60-GHz Receiver Architecture for Simultaneous Phase and Amplitude Regenerative Sampling Systems
In Proc. International Symposium on Integrated Circuits (ISIC 2016), Singapore, Singapore, December, 2016.DOI: 10.1109/ISICIR.2016.7829729
Millimeterwellen On-Chip Antennensysteme für die Integration in SoC Applikationen
PhD thesis at Karlruhe Institute of Technology (KIT), 2016
Data Converters for 100 Gbit/s Communication Links and beyond
In Proc. 2016 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2016), Austin, TX, USA, January, 2016.
Channel Parameter Estimation for LOS MIMO Systems
In Proc. International ITG Workshop on Smart Antennas (WSA 2016), Munich, Germany, Mar., 2016.
Abstract: In this paper we consider the estimation of channel coefficients and frequency offsets for LOS MIMO systems. We propose that by exploiting the structure of the channel matrix, which is present due to the geometrical nature of the channel, the estimation process can be enhanced. If a single oscillator setup is used at transmitter and receiver, respectively, this structure is preserved and can be exploited. Some methods using this fact are discussed and their performance is evaluated with respect to estimation accuracy, revealing that with relatively short training sequences, estimation results close to the fundamental bounds can be achieved.
100 Gb/s Data Link Layer - from a Simulation to FPGA Implementation
Journal of Telecommunications and Information Technology (JTIT), vol. 1, pp. 90-100, 2016.
Improved Turbo Product Coding dedicated for 100 Gbps Wireless Terahertz Communication
In Proc. IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC 2016), Valencia, Spain, September, 2016.
Towards 100 Gbps Wireless Communication: Energy Efficiency of ARQ, FEC, and RF-Frontends
In Proc. International Symposium on Wireless Communication Systems (ISWCS 2016), Poznan, Poland, September, 2016.
Evaluation of a Compact Antenna Concept for UWB Massive MIMO
In Proc. 10th German Microwave Conference 2016 (GeMiC 2016), Bochum, Germany, March, 2016.
Compact Multi Mode Element Antenna for Indoor UWB Massive MIMO
IEEE Transaction on Antennas and Propagation, vol. 64, no. 7, 2016.
High-Speed Coded Modulation for EIRP-Limited Massive MIMO Systems
Master thesis, University of Kiel, Jan. 2016
Error Resilience and Energy Efficiency: An LDPC Decoder Design Study
In Proc. IEEE Conference Design, Automation and Test in Europe (DATE 2016), Dresden, Germany, March, 2016.
Abstract: Iterative decoding algorithms for low-density parity check (LDPC) codes have an inherent fault tolerance. In this paper, we exploit this robustness and optimize an LDPC decoder for high energy efficiency: we reduce energy consumption by opportunistically increasing error rates in decoder memories, while still achieving successful decoding in the final iteration. We develop a theory-guided unequal error protection (UEP) technique. UEP is implemented using dynamic voltage scaling that controls the error probability in the decoder memories on a per iteration basis. Specifically, via a density evolution analysis of an LDPC decoder, we first formulate the optimization problem of choosing an appropriate error rate for the decoder memories to achieve successful decoding under minimal energy consumption. We then propose a low complexity greedy algorithm to solve this optimization problem and map the resulting error rates to the corresponding supply voltage levels of the decoder memories in each iteration of the decoding algorithm. We demonstrate the effectiveness of our approach via ASIC synthesis results of a decoder for the LDPC code in the IEEE 802.11ad standard, implemented in 28nm FD-SOI technology. The proposed scheme achieves an increase in energy efficiency of up to 40% compared to the state-of-the-art solution.
Saturated Min-Sum Decoding: An “Afterburner” for LDPC Decoder Hardware
In Proc. IEEE Conference Design, Automation and Test in Europe (DATE 2016), Dresden, Germany, March, 2016.
Abstract: LDPC codes are usually decoded by iterative belief propagation. However especially for small block lengths conventional belief propagation exhibits significant losses in signal-tonoise ratio compared to maximum likelihood decoding. In this paper we propose the combination of a conventional min-sum decoder enhanced by an advanced decoding scheme, that acts as a kind of “afterburner” to improve the frame error rate. We present hardware architectures and implementation results for a 28nm ASIC technology. The new decoder has a slightly higher complexity, but provides a gain of up to 1.6 dB signalto- noise ratio over conventional belief propagation decoding for short block length. In addition, we show, that the new decoder implementation can decrease the amount of dark silicon.
Advanced Iterative Channel Coding Schemes: When Shannon meets Moore
In Proc. 9th International Symposium on Turbo Codes & Iterative Information Processing, Brest, France, September, 2016.
Abstract: The continuous demands on increased spectral efficiency, higher throughput, lower latency and lower energy in communication systems imposes large challenges on appropriate channel coding schemes and their efficient hardware implementation. Consequently, channel coding is not only a matter of information theory but also more and more knowledge on efficient parallel hardware architectures and underlying semiconductor technology is required. Finally, a deep understanding of the strong interrelation of code structure, decoding algorithms, communications performance and efficient implementation in stateof- the-art semiconductor technology is mandatory. In this paper, we will highlight this strong interrelation on some advanced iterative channel coding techniques, i.e. turbo codes and LDPC codes and demonstrate challenges and limitations with respect to throughput and latency.
Interference-Aware Multi-Iterative Equalization and Detection for Frequency-Selective MIMO Channels
In Proc. IEEE International Conference on Communications (ICC 2016), Kuala Lumpur, Malaysia, May, 2016.
Terahertz Band: Channel Modelling for Short-Range Wireless Communications in the Spectral Windows
IET Microwaves, Antennas & Propagation, pp. 1–10, ISSN: 1751-8733, DOI: 10.1049/iet-map.2016.0022, 2016.
Keywords: ray tracing; submillimetre wave propagation; indoor radio; transient response; horn antennas; wireless channels
Abstract: The channel in the terahertz (THz) band is extremely frequency selective. This study demonstrates a ray-tracing method for modelling short-range propagation channels at THz band. The propagation response of sounding bandwidth and centre frequency on power delay profile (PDP) is investigated in five spectral windows with relatively low attenuations and higher available bandwidths which could possibly offer terabit-per-second links also. In this approach, a very detailed non-cubic three-dimensional model of an ultra-broadband indoor realistic office environment has been drawn up. Furthermore, the frequency-dependent standard electrical parameters for the common building materials were taken from the literature. The transmitter (Tx) and the receiver (Rx) are 10 m apart in line-of-sight scenario with exactly same height of 1.5 m above the floor. The simulations were performed using 25 dBi horn antennas at the transmitter and receiver sides, respectively, to combat high path loss. These frequency-dependent horn antennas were designed for the respective five spectral windows. Meanwhile, the corresponding channel impulse response of multipath components with spatial and temporal information such as angle of arrival, angle of departure and time of arrival has been captured to derive PDP models. Up to four reflections (i.e. fourth order) have been considered in the modelling process.
Analog and Successive Channel Equalization in Strong Line-of-Sight MIMO Communication
In Proc. IEEE International Conference on Communications (ICC 2016), Kuala Lumpur, Malaysia, May, 2016.
Analog Equalization and Low Resolution Quantization in Strong Line-of-Sight MIMO Communication
In Proc. IEEE International Conference on Communications (ICC 2016), Kuala Lumpur, Malaysia, May, 2016.
Gain-Bandwidth Tuning Techniques for Loss-Compensated Travelling Wave Amplifiers
In Proc. International Microwave and Optoelectronics Conference (IMOC 2015), Porto de Galinhas, Brazil, Nov., 2015.
0.5-20 GHz UWB distributed combiners for multi-antenna receivers
In Proc. IEEE Latin American Microwave Conference (LAMC 2016), Puerto Vallarta, Mexico, Dec, 2016.
Analysis and Design of a 220 GHz Wideband SiGe BiCMOS Distributed Active Combiner
IEEE Trans. Microw. Theory Tech., vol. 64, no. 10, pp. 3049-3059, 2016.
Broadband W-Band Power Amplifier using 40 nm bulk CMOS
In Proc. 10th German Microwave Conference 2016 (GeMiC 2016), Bochum, Germany, March, 2016.
Keywords: power amplifier; broadband; W-Band; 40 nm; CMOS; millimeter-wave integrated circuits
Abstract: In this paper the design and measurement of a four stage broadband differential power amplifier intended for W-Band using 40 nm bulk CMOS is presented. In order to achieve broadband performance a complex output matching network consisting of transmission line elements and transformers is employed. Furthermore a reliable technique that includes neutralized transistor cores is introduced. The transistor dimension and matching network are optimized for the best compromise between bandwidth, output power and power-added-efficiency. Measurements show broadband characteristic from 75 GHz until 110 GHz with more than 10 dBm of output power and 10 % of power-added-efficiency at 1.1 V supply voltage.
Evaluation of Transformer and Capacitor Coupling in W-Band Broadband CMOS Power-Amplifiers
In Proc. IEEE MTT-S International Wireless Symposium (IWS), Shanghai, China, March, 2016.
Keywords: power amplifier; broadband; w-band, 40 nm, CMOS, millimeter-wave integrated circuits
Abstract: This paper evaluates the transformer and capacitor coupling used in w-band broadband CMOS power amplifiers. Therefore two four-stage differential power amplifiers were implemented in 40 nm CMOS technology one with transformer coupling and one with capcitor coupling. In order to achieve broadband performance a complex output matching network consisting either of transmission lines and transformer or transmission lines and capacitor is employed. The output stage power amplifier core and output matching network are optimized for the best compromise between bandwidth, output power and power-added-efficiency. Both implementations are measured and compared to the state-of-the-art. For both cases a bandwith nearly over the full w-band is realized. The transformer coupled power amplifier achieves output power of 10 dBm with 10 % power-added-efficiency while the capacitor coupled power amplifier shows output power of 8 dBm with 8 % power-added-efficiency.
Hybrid Beamforming with Time Delay Compensation for Millimeter Wave MIMO Frequency Selective Channels
In Proc. IEEE 83rd Vehicular Technology Conference (VTC Spring 2016), Nanjing, China, 2016.
Power Efficiency of Millimeter Wave Transmission Systems with Large Number of Antennas
In Proc. IEEE 84rd Vehicular Technology Conference (VTC Fall 2016), Montreal, Canada, 2016.
Impact of Modulation Order and DAC Resolution on Wireless Transmitter of High Data Rate
In Proc. IEEE Radio and Wireless Symposium (RWS2016), Jan, 2016.